Endeavor
Intertech Unleashes
High
Accuracy Processor Model for
IBM
PowerPC 405™ Core Architecture
HILLSBORO, Oregon, March 16, 2001
–Endeavor
Intertech Corporation announced today the release of its high performance
Precyse™ cycle-precise processor model of IBM’s PowerPC 405 core
architecture. This Precyse
PPC405™ model is well suited to software developers who need to debug
final applications as well as device drivers because of its unique
combination of speed and accuracy.
To shorten time to market, software developers are
required to develop system and application software in parallel with the
design of the processor, and before availability of chips in quantity. A typical functional simulator can muster similar speed, but cannot
provide the accuracy necessary to prove timing correct execution of drivers
and I/O devices. Endeavor’s
Precyse PPC405 model solves this problem in one tool.
All of Endeavor Intertech’s Precyse models, built
upon its high-performance IPSim™ simulation kernel, are designed to
achieve cycle accuracy while simulating at a rate of 150,000 to 250,000
instructions per second on a Windows or Linux PC. Endeavor’s Precyse model faithfully represents PPC405 details
critical to timing like flushing the instruction pipeline on a failed branch
prediction, and appropriate delays when data or instructions are not found
in cache, using the actual cache replacement algorithms of the hardware.
Another problem that Precyse models solve is keeping
the software team in sync with the hardware configuration. When designing
with the PPC405 core architecture, hardware designers
add components to the core to create a design unique to their requirements.
However, typical simulation tools cannot be extended to represent the
final processor design. Precyse
PPC405 solves this problem with IPXtend™, an API that enables users to
enhance the core functionality by adding simple peripheral models that are
dynamically instantiated in the simulation. The Precyse model for the core
becomes a Precyse model for the chip. Endeavor Intertech also provides the service of developing custom
peripheral models.
Customers can choose between MetaWare’s SeeCode
C/C++ Symbolic Debugger and the Gnu GDB debugger front end, which are
available integrated with Precyse. Endeavor
Intertech’s Precyse PPC405 models are available immediately on Windows,
Linux and Sun workstations for $6400 in quantity.
About Endeavor Intertech Corporation
Endeavor Intertech specializes in high performance
processor models, co-simulation interfaces and tools for hardware and
software verification. Endeavor
Intertech has been in the business of developing EDA tools and models since
1997, and has quietly established itself as an innovative solution provider
for its EDA and processor design customers.
Endeavor creates models for DSP, VLIW, RISC, and other embedded cores
and processors.
For more information on Endeavor Intertech’s
Precyse models and other hardware/software verification tools, please
contact your Endeavor Intertech representative at info@endeav.com,
or 1-503-628-6200 x100. See
Endeavor Intertech on the web at http://www.endeav.com.
###
Precyse, Precyse PPC405, IPSim, and IPXtend are trademarks of Endeavor Intertech Corporation.
PowerPC and PowerPC 405 are trademarks of IBM.
Other brands and products referenced herein are the trademarks or registered trademarks of their respective holders.
For more information, contact:
For Endeavor
Intertech Corporation:
David N. Glass
Tel: (503) 628-6200 x100
e-mail: glass@endeav.com |
|
