Unified Simulation's Precyse component is a model that produces results that are cycle-for-cycle, pin-for-pin equivalent to the hardware design.  At the same time, it is an abstraction that can run as fast as 400,000 instruction per second.  Further, Precyse models can be combined—either directly with multiple Precyse-based models, or via CoOperate with 3rd party ISS models—to represent the entire system.

For the system-level engineer, this means that they can determine optimal configurations of hardware and software modules by comparing execution results of successive system simulations.  Such design trade-offs can be determined by trading out hardware and software components, and tuning system parameters.

Precyse is well suited for such investigation because of the ease of which one can add or replace both hardware and software modules.  Hardware modules can be replaced by changing out core models to determine the relative performance of competing architectures, by replacing HDL models of hardware components and co-simulating (using CoOperate to connect to the HDL), or by writing abstract models in C of hardware components and dynamically replacing them using Precyse's IPXtend^TM plug-in API.

Furthermore, Precyse provides access for tuning core parameters like 

• processor speed, 

• memory sizes and speed, 

• cache existence, size, and speed,

• and more.

Unified Simulation allows the system designer to carefully plan power and performance versus cost, to insure that their resulting design meets all expectations.